Micron shelves 4F² DRAM and turns to 3D memory

At its technology webinar on October 21, Micron announced that it will not turn its 4F² DRAM cell design into a commercial product. Scott DeBoer, the company’s executive vice president of technology and products, said Micron would not add the design—which it has researched for nearly two decades—to its manufacturing roadmap. Instead, the company will continue developing its 6F² DRAM approach and working on three-dimensional DRAM technologies.

What does 4F² DRAM promise?

The area of a DRAM cell is defined in terms of “F,” the minimum feature that can be printed in a manufacturing process. In the common 6F² layout used today, a cell is 3F long and 2F wide. The 4F² design reduces the cell to 2F × 2F by positioning the transistor channel vertically rather than horizontally.

On paper, this layout could reduce the area per cell by about one-third compared with a 6F² structure. But in Micron’s assessment, shrinking the cell alone does not translate into a proportionally higher memory density. How closely the capacitors can be placed is also one of the factors that limits overall density.

Why is Micron taking a different path?

Despite researching 4F² for a long time, Micron does not consider the design’s projected area advantage sufficient under real manufacturing conditions. The company’s view is that constraints on capacitor placement could diminish the gains from shrinking the cell. Micron is therefore continuing with the 6F² layout and turning to 3D DRAM rather than commercializing 4F².

According to TechPowerUp’s report on the webinar, Micron also said it could manufacture the 4F² design at a higher cost on older process nodes, but sees scaling issues on advanced nodes. The same source notes that the company has been studying a cell structure with vertical-channel transistors for about two decades. The decision does not mean that the 4F² approach has been abandoned across the industry; other memory manufacturers have different strategies.

Separately from TechPowerUp’s report, SammyFans says Micron’s roadmap calls for mass production of 1-delta DRAM at its Boise facility to begin in the second half of 2027, with wafer bonding technology to be integrated into production at the subsequent 1-epsilon node. This timeline is separate information about Micron’s DRAM roadmap and should not be confused with the 4F² decision itself.

Impact on architecture, interior design, and archviz workflows

The announcement does not report any direct changes to architecture or visualization software, or to project files. Micron did not provide a price or release date for any specific memory module in its webinar announcement. The separately reported roadmap concerns the 1-delta and 1-epsilon manufacturing processes; it does not specify workstation compatibility or hardware requirements.

As a result, there is no concrete reason for offices to upgrade their existing computers solely because of the 4F² decision. Until verified information about new memory products and application compatibility becomes available, hardware planning should be based on current workloads and technical requirements. Micron’s strategy shift is worth following as a long-term change in memory manufacturing, rather than as an immediate workstation adjustment.